Press Release

Apache’s Full-chip Dynamic Physical Power Integrity Solution Adopted by STMicroelectronics

RedHawk provides accurate verification of low power and leakage control designs

Mountain View, Calif. – March 8, 2005 – Apache Design Solutions, the technology leader in physical power integrity solutions for system-on-chip (SoC) designs, today announced that STMicroelectronics has adopted Apache’s SoC power closure sign-off flow for immediate use on ST’s Nomadik TM low-power application processor designs. After an extensive evaluation, ST selected RedHawk for its extremely fast ability to verify the dynamic behavior of their advanced low power designs migrating to 90nm and 65nm process nodes.

“As we use new design techniques to address the challenges of leakage current and rigid power requirements, we needed an accurate method for verifying the chips’ power, timing and functionality,” said Alain Artieri R&D director for Nomadik Multimedia Platforms at STMicroelectronics. “Apache’s silicon proven dynamic power integrity solution offers the most accurate verification for our advanced low power design techniques, including power-gating.”

For designs at 90nm and below, static IR-drop analysis is no longer sufficient to meet ST’s needs. RedHawk’s ability to perform full-chip transient verification of the power/ground network to identify the dynamic impact on timing and yield was critical for many of their upcoming designs. In addition, for low-power applications, RedHawk provides the unique ability to accurately model the ramp-up behavior of the header/footer switches used in power-gating.

“We are seeing an increasing number of customers experience chip failures and low yield as power becomes one of the most important design issues for sub-130nm designs,” said Andrew Yang, CEO of Apache. “Having leading semiconductor companies such as STMicroelectronics adopt our power integrity flow demonstrates how our solution is addressing the critical power closure requirements for advanced nanometer designs.”

About RedHawk

RedHawk is a full-chip vectorless dynamic physical power integrity solution for SoC power closure sign-off of 130nm, 90nm, and 65nm designs. Certified in TSMC’s 5.0 and 6.0 Reference Flow and correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as the effects of on-chip inductance, package RLC , and decoupling capacitance.

RedHawk enables designers to identify dynamic “hot spots,” examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. With RedHawk’s integrated transistor-level characterization and unsurpassed capacity, designers can effectively reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, power gating, multiple voltage domains, and multiple threshold transistors.

About Apache Design Solutions

Apache is an EDA software supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design, such as power, signal, package / system IO, substrate, and temperature, Apache’s silicon signoff platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor neutral platform enables designers to adopt any industry’s standard physical design flow and is certified by TSMC’s 5.0 and 6.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies.

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.

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