Press Release

ATI Technologies Inc. Signs a Multi-Million Dollar, Multi-Year Deal with Apache Design Solutions

Mountain View, Calif. – June 10, 2005 – Apache Design Solutions, the technology leader in physical power integrity solutions for system-on-chip (SoC) designs, today announced that ATI Technologies Inc., a world leader in design and manufacturing of innovative graphics processor solutions, expanded its world-wide adoption of Apache’s complete dynamic power integrity suite, including RedHawk-EV with PowerGate (low-power ramp-up analysis), NSpice-PI, and recently announced PsiWinder (see announcement dated June 6, 2005 – “Apache Introduces PsiWinder, A Complete Power and Signal Integrity Timing Sign-off Solution.”). In a multi-million dollar per year, multi-year agreement, ATI will use Apache’s products for dynamic power and timing sign-off, as well as package-IC interface analysis.

“We found that Apache has a good vision of where the tools should be going and what kind of problems, we as designers, are facing and trying to address,” said Simon Burke, engineering manager at ATI. “We’ve been using RedHawk for more than a year on our most advanced production designs and we’ve been very pleased with its ability to accurately analyze the impact of dynamic voltage drop of our chips. We’re also impressed with Apache’s ability to deliver robust and on-time solutions for our unique enhancement requests.”

“Moving forward, we will continue to work with Apache to broaden our deployment and address emerging challenges such as global I/O SSO,” continued Burke. “Recently, we evaluated PsiWinder for combined power and signal integrity critical path timing analysis, including the clock tree. By using PsiWinder we were able to dramatically shorten and automate our SPICE netlist extraction, setup, and simulation time. This not only significantly increases the number of paths we can analyze per day but also improves our productivity.”

“Apache is excited that one of the leading fabless semiconductor companies such as ATI has placed their long-term trust in our technology and products,” said Andrew Yang, CEO of Apache. “Apache is a proven leader in dynamic power integrity with more than 150 dynamic tape-outs, and our solutions are well poised to address our customer’s future design challenges.”

About RedHawk

RedHawk is a full-chip Vectorless Dynamic™ physical power integrity solution for SoC power closure sign-off of 130nm, 90nm, and 65nm designs. Certified by TSMC’s 5.0 Reference Flow and correlated with silicon measurements and SPICE, RedHawk addresses dynamic power issues such as simultaneous switching output (SSO) for core, memory, clock, and I/O, as well as effects of on-chip inductance, package RLC , and decoupling capacitance.

RedHawk enables designers to identify dynamic “hot spots,” examine the impact on timing, accurately pinpoint the cause of dynamic voltage drop, and automatically repair the source of supply noise. With RedHawk’s integrated transistor-level characterization to assure accuracy, designers can reach power closure sign-off for high performance SoCs, including those utilizing advanced low-power design techniques such as leakage current control, power gating, multiple voltage domains, and multiple threshold transistors. The PowerGate option enables RedHawk to analyze the ramp-up, ramp-down transient behavior of power-gated blocks as well as back-biasing impacts.

About Nspice

Nspice is a high capacity, mixed-domain, next-generation Spice for I/O, signal, and power integrity. For high-speed I/Os and interfaces to multi-port/multi-gigabit systems, Nspice directly takes in S-parameter data for 100+ ports and accurately simulates a combination of IC-package-board-connector-backplane topologies. Nspice is fully Hspice compatible with unprecedented performance and capacity, while delivering true-spice accuracy.

About Apache Design Solutions

Apache is an EDA software supplier of innovative next-generation silicon integrity platforms for low-power, high-performance system-on-a-chip (SoC) designs. By considering all sources of noise that impacts the design, such as power, signal, package / system IO, substrate, and temperature, Apache’s silicon signoff platform enables designers of leading networking, wireless, communication, consumer, and semiconductor companies to detect, fix, and prevent design weaknesses that can result in reduced yield or failed silicon. Apache’s vendor neutral platform enables designers to adopt any industry’s standard physical design flow and is certified by TSMC’s 5.0 and 6.0 Reference Flow (NYSE: TSM). Apache has direct sales and support offices worldwide with over 40 customers, including 7 of the top 10 semiconductor companies.

About ATI Technologies Inc.

ATI Technologies Inc. is a world leader in the design and manufacture of innovative 3D graphics and digital media silicon solutions. An industry pioneer since 1985, ATI is the world’s foremost graphics processor unit ( GPU ) provider and is dedicated to deliver leading-edge performance solutions for the full range of PC and Mac desktop and notebook platforms, workstation, set-top and digital television, game console and handheld markets. With 2004 revenues of approximately US $2 billion, ATI has more than 2,700 employees in the Americas, Europe and Asia . ATI common shares trade on NASDAQ ( ATYT ) and the Toronto Stock Exchange (ATY).

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.

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