Press Release

LG Adopts Apache’s PsiWinder for Full-Chip Clock Jitter and Critical Path Timing Sign-off

PsiWinder Delivers Silicon Correlated Results for SoC Jitter Analysis

MOUNTAIN VIEW, Calif. – February 6, 2007 - Apache Design Solutions, the technology leader in power sign-off and complete silicon integrity platform solutions for system-on-chip (SoC) designs, today announced that LG used PsiWinder to accurately measure full-chip jitter on their clock network and optimize their design to minimize the impact of noise. By using PsiWinder for full-chip jitter analysis, LG is able to reduce the risk of silicon re-spin due to jitter induced timing failures.

The impact of jitter noise on the clock tree network has become a critical design concern as process nodes move beyond 90nm, especially for high-performance multi-clock designs. But traditional methods have not supported a quantitative way to determine jitter noise on a clock network, as jitter analysis is a complex issue attributed by the combination of power noise, package noise, crosstalk noise, etc. and is dependent on the functional operation mode. PsiWinder, a full-chip noise analysis tool with Spice-level accuracy considers the concurrent effect of dynamic power and ground noise, LC resonance, and crosstalk, resulting in accurate measurements of jitter noise on the clock tree. PsiWinder has been in production use by several customers for over a year and have produced silicon correlated results as close as 5% of measurement.

“By using PsiWinder from Apache, we were able to quantitatively determine the full-chip clock jitter caused by switching noise including inductive and crosstalk effects,” said Woo-Hyun Paik, vice president of LG Electronics. “We were very pleased with how well PsiWinder’s results correlated with our silicon measurements.”

“Jitter noise has become one of the key design challenges at 90nm and below processes and our customers are looking for solutions that can accurately determine the impact of jitter on their clock tree,” said Dian Yang, General Manager and Vice President of Product Management at Apache. “We are pleased to see an increasing adoption of PsiWinder by leading semiconductor companies to address this critical need.”

Apache Design Solutions will be hosting a webinar on How to Manage Clock Jitter Noise for Accurate Timing Signoff using PsiWinder on February 13, 2007 at 10:00AM PST. Registration is now open online at http://seminar2.techonline.com/s/apache_feb1307.

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, Sahara-PTE, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.

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